Blueshift Memory, designer of a novel proprietary high-speed computer architecture, and Adaps, a technology consulting and managed services group headquartered in Melbourne with operations in Singapore, India, Malaysia, and the United States, have announced a non-exclusive channel partner agreement.
Under the terms of the agreement, Adaps will market and resell Blueshift Memory’s products worldwide, with initial deployments in Australia, New Zealand, and North America and a growing pipeline across India and the wider Asia-Pacific (APAC) region. These products include an innovative quantum-resilient enterprise compute node that is secure against ‘Harvest Now, Decrypt Later’ threats.
Under the agreement, Adaps will handle local lead generation, customer account management, and first-line support across its territory, while Blueshift Memory will provide the underlying technology solutions and support. The partnership covers Blueshift Memory’s current product configurations – including an ultra-performance enterprise compute node, a quantum-secure memory solution, and a vision AI & neural network acceleration engine – and will also encompass its chiplet-based products when these are released in 2027.
The partnership is being announced at SEMICON India 2026 in New Delhi, where Adaps is presenting its semiconductor and AI infrastructure practice.
“Enterprises across India, South-East Asia, and Australia are running AI, analytics, and secure-infrastructure workloads that are now bound by memory, not compute,” said Anand Tatavarthi, CEO of Adaps. “The Cambridge Architecture removes that constraint without rewriting existing applications, and does so on quantum-resilient foundations. Adaps has spent six decades helping organisations in this region adopt transformational technology, and we are proud to be Blueshift Memory’s partner in bringing it to enterprise customers and systems integrators across Asia-Pacific.”
“This agreement with Adaps is a strategically significant relationship for Blueshift Memory, enabling us to considerably advance our commercial roadmap,” said Orsi Kneitner, CEO of Blueshift Memory. “The new partnership enables us to respond to a critical market need, as enterprises and institutions worldwide are increasingly concerned about the implications of Q-Day and the ‘Harvest Now, Decrypt Later’ threat. Our solution offers world class security and peace of mind to global enterprises. Furthermore, as we work to bring our chiplet technology to market, engaging with customers in this important region of the world will create further validation of the Cambridge Architecture as a means of solving the Memory Wall in multiple new real-life scenarios.”
More about the Cambridge Architecture
The computer architecture that underpins almost every processor built since the 1970s is unable to cope with modern data-intensive workloads, with memory movement being the binding constraint. This is now holding back progress and wasting energy in all types of computing device, from supercomputers to smartphones. As large language models and other AI workloads have grown, the volume of data moving between memory and processor has grown in proportion, with the result that a significant proportion of CPU cycles are spent simply calculating where the data resides before it can be delivered. Since moving a single bit of data can consume 1,000 times more energy than actually processing it, a considerable amount of energy is wasted just to reach the data.
Located between the memory and compute functions, the Cambridge Architecture structures and organises the data to ensure it is delivered efficiently to the processor exactly when it is needed. The result is to make existing compute resources substantially more effective, by removing memory-access and data-movement bottlenecks. This approach is complementary to – rather than a replacement for – other next-generation technologies addressing the memory wall challenge, including HBM, near-memory and compute-in-memory techniques, and photonics.
The Blueshift Memory technology is hardware-verified on FPGA, demonstrating calculation speed gains of up to 300 times and potential energy savings of up to 90%, depending on the workload, on standard STREAM memory benchmarks. This acceleration figure is projected to be up to 1,000 times when the technology is realised on silicon.
