Market Analysis

AI data centre processors to top $1.7Tn by 2031

AI data centre processors to top $1.7Tn by 2031

Hyperscaler Capex will almost double in 2026 and is set to reach about $1.9 trillion by 2031, shifting free cash flow from the hyperscalers to their semiconductor suppliers. The effect is already visible in processor revenues: Yole Group’s Data Centre Processor Monitor records CPU revenue at $13.2 billion in Q2 2026, up 34.9% on the previous quarter and driven by Agentic AI demand, alongside $66.3 billion for GPUs and $15.1 billion for AI ASICs.

Against this backdrop, Yole Group releases its latest report, Networking for Data Centres 2026, which offers a comprehensive analysis of the data centre networking industry, its ecosystem, the technical insights, and technology roadmaps shaping next-generation architectures.

Networking is the fastest-growing segment of the data centre semiconductor market, increasing from about 13% in 2026 to 34% in 2031. The data centre networking chip market will be worth $53 billion in 2026, and AI workloads account for about 88% of that revenue.


By network domain, scale-out already captures 60% of 2026 revenue, ahead of front-end at 29%, and scale-up at 11%. Scale-up switches are the fastest-growing switch segment: volumes increase by 94% in 2026 over 2025, followed by 59% revenue growth per year to $42 billion in 2031, with co-packaged optics technology at 23% of the mix.

“In AI clusters, the share of spend going to data movement is climbing faster than the share going to compute. Interconnect is no longer a supporting line item in a data centre budget; it has become one of the main ones,” said Adrien Sanchez, Technology & Market Analyst, Computing & Software at Yole Group.

US companies dominate this dynamic market. NVIDIA ranks as the world’s number one networking ASIC supplier in 2025 and 2026, having pioneered switch-based scale-up architecture and being a key player in high-performance scale-out for AI giga clusters.

From 2026, Broadcom, Cisco, Marvell, Astera Labs, and Huawei are carving out significant positions, particularly with AMD MI400 GPUs, while hyperscalers such as AWS, Meta, and Microsoft are developing their own AI ASICs. Google’s TPU sits apart from the scale-up and scale-out framework, connected point to point in a torus topology rather than through packet switches.

In scale-out switches, Broadcom leads the market in 2026, with NVIDIA close behind, followed by Cisco, Marvell, and Huawei. The NIC ranking looks entirely different: NVIDIA dominates by a wide margin, ahead of AMD, AWS Nitro (for internal use), and Broadcom. With most networking silicon built on advanced nodes, TSMC is the leading foundry for this market. In mainland China, Huawei HiSilicon dominates, co-designing its interconnect alongside its Ascend AI ASICs, with no domestic vendor at comparable scale. Meeting 2031 demand for networking silicon alone would require at least two new leading-edge fabs based on our wafer demand forecast.

With networking on track to represent a third of the data centre semiconductor market by 2031, the pace and direction of this new cycle have never been more critical for chipmakers, hyperscalers, equipment vendors, and investors.